Manufacturers today are under immense pressure, coping with wider process variation manifested at wafer and die levels in single-digit nodes, highly advanced designs, and effects of application and system integration. Even with the plethora of tests and tests often being applied multiple times under different electrical/environmental conditions, quality escapes exist. These can be either a time-zero issue or a “walking wounded” device that carries enhanced reliability risks with no externally visible or parametric evidence of a problem. Further BKM testing-limitations include under or random sampling, limited coverage, test-to-test miscorrelation, and the inability to detect small or marginal defects.
As reliability requirements arise and quality targets become harder to achieve, Deep Data is needed to support the new testing realm of semiconductors. This presentation will discuss a new approach to health and performance monitoring of electronics based on chip telemetry. By applying machine learning algorithms to data created by high-coverage on-chip monitoring IPs, systems can be monitored throughout the lifecycle of design, characterization, qualification, production and during in-field operation.
The presentation was originally presented at the ITC- Asia in SEMICON Taiwan 2020.