Application-Specific Power Performance Optimizer
Based on Chip Telemetry

White Paper


As datacenter power consumption continues to pose cooling and cost challenges, and battery driven devices are expected to last longer between charges, the search for advanced power management mechanisms continues.

A modern design must balance between maximizing performance, consuming the least amount of power, and guaranteeing no failures in field. The latter requires safety margins which translate into guard-bands that could otherwise be used to boost performance and/or reduce power. Either the design is “squeezed” to the max and therefore it risks failure since there were insufficient guard-bands to overcome in-field events or power/performance is “left on the table” to provide those guard-bands “just in case”.

Introducing proteanTecs AVS Pro™

Achieve significant in-field power savings

AVS Pro is a closed-loop hardware-firmware application for reliability and functional-workload aware adaptive voltage scaling (AVS). Based on timing margin agents, AVS Pro leverages excessive guard-bands to reduce power while guaranteeing failure prevention. This silicon-proven technology has enabled customers to reduce their power consumption by an average of 8-14%.

‍proteanTecs’ AVS Pro™ monitors the margin to timing failure of millions of real paths, in real time, under real workloads, to reduce voltage to the lowest point that still allows error-free functionality. It also provides an inherent safety-net, enabling fast frequency and voltage scaling to maintain error free functionality when events like voltage drops occur. These features provide the capability to be “workload aware” and maximize the power reduction, while avoiding failure. In this paper we will demonstrate how this solution can save between 9%-14% dynamic power when compared to conventional methods.

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