Datacenter Chipmaker Achieves Double-Digit Power Reduction with Next-Gen Voltage Scaling
Discover how the fabless chipmaker used proteanTecs AVS Pro™ to dramatically reduce voltage guard bands with a failure-avoidance protection layer
Discover how the fabless chipmaker used proteanTecs AVS Pro™ to dramatically reduce voltage guard bands with a failure-avoidance protection layer
Competitive edge as a low-power solution
on datacenter power costs
Higher utilization rate per system
A fabless chipmaker making 5nm networking chips for datacenters
The customer develops networking devices that enable high-speed communication in datacenters.
The chips were designed for low power consumption to reduce energy costs and heat dissipation for server farm operators.
High power consumption due to excessive voltage guard-bands
Excessive voltage guard-bands weighed down the power efficiency of the chip, threatening one of its key selling points.
Opting for worst-case guard-bands was meant to ensure correct functionality across diverse workload demands, aging, environmental conditions, and temperatures. However, operating at voltages that are higher than needed comes at the expense of performance.
The customer had to find a method to reduce the guard-bands in mission-mode, without risking hardware failures, while accommodating varying workloads.
Power optimization with a safety-net using advanced Adaptive Voltage Scaling (AVS) in real-time
The customer integrated proteanTecs AVS Pro to unlock significant power gains. This solution safely reduces voltage guard-bands to optimize power per application.
Unlike traditional methods which rely on local on-chip sensors and structures, AVS Pro monitors actual margin-to-timing- failure at high coverage for real-time voltage scaling.
It allows precise guard-band usage based on actual workloads, aging, temperature, noise, and IR drops to reduce more power while ensuring failure prevention.
AVS Pro includes interrupt-based hardware failure protection for risk-free operation, with real-time response when close- to-failure.
Substantial power reduction:
Thanks to AVS Pro, the customer safely decreased the voltage from 650 mV to an average of 608 mV, resulting in a
12.5% dynamic power reduction. This significant optimization helped the
chipmaker stand out as a low-power alternative to traditional networking devices.
Considerable cost saving:
The power reduction allows hyperscale cloud vendors to save more than $5,000,000 per year on energy costs. They can also gain more than 11% performance increase thanks to a higher utilization rate per system.